IEC 60191-6-10 Ed. 1.0 b

Mechanical standardization of semiconductor devices – Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages – Dimensions of P-VSON

Published by	Publication Date	Number of Pages
IEC	11/19/2003	24

Category: IEC

IEC 60191-6-10 Ed. 1.0 b – Mechanical standardization of semiconductor devices – Part 6-10: General rules for the preparation of outline drawings of surface mounted semiconductor device packages – Dimensions of P-VSON

IEC 60191-6-10:2003 provides the common outline drawings and dimensions for all types of structures and composed materials of plastic very thin small outline non-lead package (hereinafter called P-VSON).