This specification covers the detail requirements for monolithic silicon, N-channel, dynamic, NMOS, 65, 536/1-bit, random access memory microcircuits utilizing a 128 cycle refresh architecture and having pin number 1 as a no-connect.
Product Details
- Published:
- 11/09/2010
- Number of Pages:
- 1
- File Size:
- 1 file , 34 KB
- Note:
- This product is unavailable in Ukraine, Russia, Belarus
